Ethernet Controller

Product Application
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Product Details

    The CBM1001A-Q is a fully integrated and cost-effective single chip Fast Ethernet MAC controller with a general processor interface, a 101100M PHY and 4K Dword SRAM. It is designed with low power and high performance process that support 3.3V with 5V tolerance.

    The CBM1001A-Q also provides a Mll interface to connect HPNA device or other transceivers that support Mll interface. The CBM1001A-Qsupports 8-bit, 16-bit and 32-bit uP interfaces to internal memory accesses for different processors. The PHY of the CBM1001A-Q can interface to the UTP3, 4, 5 in 10Base-T and UTP5 in 100Base-TX. It is fully compliant with the IEEE 802.3u Spec. Its auto-negotiation function WII automatically configure the DM9000 to take the maximum advantage of its abilities. The CBM1001A-Qalso supports IEEE 802.3x full- duplex control. This programming of the CBM1001A-Q is very simple, so user can pod the sonvare drivers any system easily.

Functional Characteristics

  • Supports processor interface: byte/word/dword of I/O command to internal memory data operation

  • Integrated 10/100M transceiver

  • Supports Mll and reverses Mll interface

  • Supports back pressure mode for half-duplex mode flow control

  • IEEE802.3x flow control for full-duplex mode

  • Supports wakeup frame, link status change and magic packet events for remote wake up

  • Integrated 4K dword SRAM

  • Supports automatically load vendor ID and product ID from EEPROM

  • Supports 4 GPIO pins

  • Optional EEPROM configuration

  • Very low power consumption mode:

  • Power reduced mode (cable detection)

  • Power down mode

  • Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction.

  • Compatible with 3.3V and 5.0V tolerant I/O

  • LQFP-48

Sample application

ModelPackagePinsTemp RangePacking QtyRoHSSample




0℃ to +70℃

Tray, 1250

RoHSOnline Apply

Document download

  • File Name File Description File Size Time Download
  • CBM1001A Datasheet 1.4M 2023-08-31
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